Today, i added a test image generated from VTC_DEMO (see yesterday's post). What this means is that besides RGB loop, now this test image can be seen. You need to select this test image by turning switch sw7 up on the Atlys FPGA. Previously, the ideas was to use switches sw7 and sw6 for future purposes. But today i ended up using sw7 for test image. Here is a Demo of the test image.
This also brings us closer to DDR2 integration. Right now, we are confident that HDMI traffic from VTC_DEMO is correctly captured in a file which is then read by packetizer using $readmemb. $readmemb is synthesized into BRAM or LUTs. That is how test image is read by packetizer, which eventually sends it to downstream MAC and off to the destination PC.
Documentation has been updated as well. It will continue this week.
Please share your comments directly on the Documentation or here.
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