Now that UDP is working on Atlys FGPA and i can send UDP packets from Atlys FGPA to PC, i am working on adding RTP on top of UDP. Since i already have the RTP packetizer that interfaces with MAC, the only thing that is left is replacing the input simulation model to RTP packetizer (that provides it with pixels) with actual synthesizable model. I have HDMI pixel data dumped in a file, which is being read by RTP packetizer to create RTP packets. But now, i need something like DDR2 or RAM that holds this data. This stackoverflow post may be good enough as well. Let me try that and update the blog.
Its 4th of July holiday in US. Time to take a break as my family is coming to visit me for the day. I will keep it going on the weekend.
To start with, I would just transmit a single colour or a simple test pattern, e.g. each RGB pixel increments in value by 1, or a checkerboard pattern. This will prove that the RTP packets are valid. You'll never get an entire video frame to fit in the bit file using the $readmemb method - there is simply not enough BRAM in the FPGA.
ReplyDeleteI have a simple colorbar generator you might be able to use.
ReplyDeleteIt is available here:
https://github.com/cfelton/alt.hdl/tree/master/examples/ex6_vgasys/myhdl
To generate the Verilog or VHDL you need these files:
convert_color_bars.py
vga_color_bars.py
vga_intf.py
Brief description of the conversion arguments:
>> python convert_color_bars.py --help
usage: convert_color_bars.py [-h] [--resolution RESOLUTION] [--width WIDTH]
Convert colobar generator
optional arguments:
-h, --help show this help message and exit
--resolution RESOLUTION
define the resolution, x, e.g. 1280x720
--width WIDTH define the pixel width in bits
To generate the Verilog for 720p and 8 bits per RGB pixel (24bits):
>> python convert_color_bars.py --resolution=1280x720 --width=8
If you use a simple pattern generator you will not need to bother
with large memories to hold a stream or single screen.
If you decided to use the simple colorbar we can have a VC
on Tuesday and discuss the interface and how it can be mapped
to you current interface.
Also, in the HDMI2USB there is a pattern generator that you
could use ...
Also, you can try and leverage you VTC_demo that generates
ReplyDeletethe pattern but you will need to extract just the video part (active pixels).
Originally, I thought we should use the HDMI2USB gateware to
generate the pattern but the others didn't think this was a good
idea. I believe the rationale is that the current HDMi2USB has
complicated flow control. The USB module will request a new
frame instead of being a sink (consuming the video stream).
The existing flow control is currently being modified, reproducing
the complicated flow in the RTP example would be burdensome
and could be wasted effort.
Regards,
Chris